STA (SI30FT RM 3520)

Position: STA (SI30FT RM 3520)

Responsibilities will include, but are not limited to:
• Doing STD cells characterization work (max up to 40% of time) , Static timing analysis (60%)
• Able to characterize basic STD Cells
• Writing ARC for STD cell char (using primeLib , Silicon smart) lib QA check
•Circuit understanding block wise , Full chip level
• Static timing Analysis of DRAM block wise , top level analysis , cell level analysis
• Writing constraints , analysing the STA reports
• Reporting violations to Design team , ownership for closure
• Parasitic modelling and assisting in design validation, reticle experiments and required tape-out revisions
• Performing verification processes with modelling and simulation using industry standard simulators
• Contributing to cross group communication to work towards standardization and group success
• Driving innovation into the future Memory generations within a dynamic work environment

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