Formal Verification Data path (SI37FT RM 3959)

Position: Formal Verification Data path (SI37FT RM 3959)

Key Responsibilities

• Perform formal datapath verification (DPV) of arithmetic units using Synopsys VC Formal DPV
• Verify floating-point datapaths (scalar and vector) for:
  o IEEE-754 compliance
  o Rounding modes
  o Exception handling (NaN, Inf, denormals)
• Verify floating-point vector pipelines, lane alignment, and data consistency
• Work on integer datapaths (ALUs, MACs, shifters) and custom arithmetic units
• Develop and maintain reference models (C/C++/SystemVerilog) for datapath verification
• Debug complex formal failures and identify RTL or spec issues
• Collaborate with micro-architecture and design teams

Required Skills

• Strong hands-on experience with Synopsys VC Formal DPV
• Proven experience in formal datapath verification
• Deep understanding of:
  o Floating-point arithmetic (IEEE-754)
  o Vector datapath architectures
  o Integer arithmetic units
• Ability to analyze math-heavy RTL
• Experience with pipelined and deeply staged datapaths
• Proficiency in SystemVerilog
• Experience with C/C++ reference models

Good to Have

• CPU / GPU / NPU / DSP datapath verification experience
• Exposure to formal equivalence or word-level formal
• Experience verifying custom arithmetic datapaths
• Background in computer architecture or digital arithmetic

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