AMS Verification Engineer (CE810SI RM 4589)

Position: AMS Verification Engineer (CE810SI RM 4589)

Work Mode : Work from Client office in Bangalore
Experience Level: 8 to 10 Years (Do not send resume below 8 Years)
Relevant Experience required : 8 to 12 Years
Education Required : Must have bachelor’s degree

Must have skills:
Strong expertise in Digital Mixed-Signal Verification (DMS), SystemVerilog, UVM, and Real Number Modeling (RNM).

• Hands-on experience with PLLs, USB, clock generators, power management circuits, data converters (ADC/DAC), and mixed-signal interfaces.
• Experience in Schematic vs Model Validation, behavioral model development/correlation, and mixed-signal debug.
• Understanding of analog concepts including noise, jitter, latency, settling time, calibration, accuracy, and timing impacts from an SoC verification perspective.
• Experience with mixed-signal simulators and flows (Xcelium AMS or equivalent).
• Strong experience in coverage-driven verification, regression management, assertion-based checks, and verification planning.
• Ability to debug complex analog-digital interactions and drive closure across multiple teams.
• For the Lead role: technical leadership, verification architecture ownership, mentoring, stakeholder management, execution planning, and signoff responsibility.
• Strong expertise in Digital Mixed-Signal Verification (DMS), SystemVerilog, UVM, and Real Number Modeling (RNM).
• Hands-on experience with PLLs, USB, clock generators, power management circuits, data converters (ADC/DAC), and mixed-signal interfaces.
• Experience in Schematic vs Model Validation, behavioral model development/correlation, and mixed-signal debug.
• Understanding of analog concepts including noise, jitter, latency, settling time, calibration, accuracy, and timing impacts from an SoC verification perspective.
• Experience with mixed-signal simulators and flows (Xcelium AMS or equivalent).
• Strong experience in coverage-driven verification, regression management, assertion-based checks, and verification planning.
• Ability to debug complex analog-digital interactions and drive closure across multiple teams.
• For the Lead role: technical leadership, verification architecture ownership, mentoring, stakeholder management, execution planning, and signoff responsibility

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