Position: Design Verification Lead (SI90FT RM 3218) Job Description:● Define Test Plan/Design, test cases and develop Test Scripts to validate RPG product● Work with architecture & design team to define validation flow and methods● Should have prior knowledge in PHY verification, high speed blocks with IOs● Run and debug gate-level simulations● Knowledge of bus protocols …

Position: ASIC RTL Design Lead (SI90FT RM 3217) Job Description:● Innovate, implement, and verify RTL code for complex PHY sub systems dealing with high speed blocks using Verilog/System Verilog● knowledge of Power Intent format (UPF) and Timing Constraints (SDC) is a must.● Collaborate with DFT, PD, Hardware and Firmware teams for delivering the most optimal …