AMS Verification Engineer (BB48FT RM 4317)

Position: AMS Verification Engineer (BB48FT RM 4317)

Job Description
We are seeking a highly motivated AMS Verification Engineer with hands-on experience in Analog Mixed Signal verification for complex SoC and IP designs. The candidate will be responsible for developing verification environments, creating behavioral models, and validating analog and mixed-signal blocks to ensure first-pass silicon success.

Educational Qualification : B.E./B.Tech/M.E./M.Tech in Electronics, Electrical, VLSI, ECE, or related field.

Experience : 4–8 years of experience in AMS Verification, Analog Verification, Mixed Signal Verification, or AMS Modeling

Key Responsibilities

• Develop and execute verification plans for Analog Mixed Signal (AMS) IPs and SoCs.
• Create and maintain SystemVerilog, Verilog-AMS, and Real Number Models (RNM) for mixed-signal verification.
• Develop AMS testbenches and verification environments.
• Perform block-level and subsystem-level verification of analog and mixed-signal designs.
• Execute schematic-versus-model correlation and validation.
• Analyze simulation results, debug failures, and perform root cause analysis.
• Work closely with Design, Modeling, and Validation teams to achieve verification closure.
• Develop functional coverage, assertions, and regression suites.
• Automate verification flows using scripting languages.

Required Skills

• Strong experience in AMS Verification.
• Hands-on experience with:
  o SystemVerilog
  o Verilog-AMS
  o UVM
  o RNM (Real Number Modeling)
• Experience with Cadence AMS verification flow:
  o Xcelium AMS
  o Spectre
  o Virtuoso
• Good understanding of:
  o ADC
  o DAC
  o PLL
  o LDO
  o Bandgap References
  o PMIC
  o Op-Amps
  o Data Converters
• Experience in mixed-signal co-simulation and behavioral modeling.
• Strong debugging and waveform analysis skills.
• Knowledge of scripting languages such as Python, Perl, or TCL.

Preferred Skills

• Experience in Power Management verification.
• Knowledge of low-power verification concepts.
• Exposure to UVM-MS methodology.
• Experience with high-speed mixed-signal interfaces.
• Understanding of semiconductor design and verification flows.

Tools

• Cadence Xcelium AMS
• Spectre
• Virtuoso
• SimVision
• Synopsys CustomSim (preferred)
• Python / Shell Scripting

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