Digital DV Engineer (SI70FT RM 3220)

Position: Digital DV Engineer (SI70FT RM 3220)

Key Responsibilities

• Develop and maintain reusable, scalable, and modular processor-level verification environments using UVM System Verilog.
• Design and implement test plans, testbenches, and directed/random tests to validate ARM M-series (Cortex M33, M85, M55, M4, M0 etc) and RISC-V processor designs. Having exposure to DSP processor would be a plus.
• Integrate and verify processor subsystems in SoC environments, ensuring seamless interaction with other components.
• Execute regression tests to ensure functionality and robustness across various scenarios and corner cases.
• Analyze simulation results, debug issues, and provide detailed reports to design and verification teams.
• Collaborate with cross-functional teams, including architecture, software, and hardware, to define verification strategies and ensure alignment.
• Optimize verification flows, improve coverage metrics, and manage verification closure for processors.
  Required Skills and Qualifications
• Bachelor’s or Master’s degree in Electrical/Electronic Engineering, or a related field.
• 5+ years of hands-on experience in processor verification.
• Proficiency in UVM SystemVerilog for developing verification environments and testbenches.
• Solid understanding of processor architectures, instruction sets, and pipeline designs.
• Knowledge of AMBA protocols and interfaces used in SoCs
• Strong experience with C programming for processor-level test development.
• Familiarity with verification methodologies, including constrained random testing, coverage-driven verification, and assertion-based verification.
• Proficient in using EDA tools for simulation, debugging, and coverage analysis.
• Ability to debug RTL-level issues and work closely with design engineers for resolution.

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