FPGA Design & Verification engineer (SI68FT RM 3546)

Position: FPGA Design & Verification engineer (SI68FT RM 3546)

REQUIRED:

• Proven experience in FPGA system design from IP Integration to implementation.
• Strong in Verilog RTL based IP design,
• Strong in Verilog/System Verilog based testbench development
• Experience with AMD Vivado & Vitis SDK & VItis AI tools.
• Experience with C/C++ in developing Embedded FW & scripting automation using Python
• Experience with Petalinux build flow , familiarity with Uboot, linux driver changes and FPGA SoC debugging.
• Proven ability to work as part of a global team in multiple geographies
• B.Tech. in Electronics , Electrical , Computer Science Engineering
• Requires at least 7 years of experience in FPGA/RTL & Test-Bench/ embedded systems architecture
• Multi-disciplinary experience, including Firmware, HW, and ASIC/FPGA design

PREFERRED:

• Knowledge of FPGA Chip to Chip interfacing & AMD FPGAs is an advantage
• Knowledge of PCIe Gen4/5/6 technology is an advantage
• Previous experience with storage systems, protocols, and NAND flash – strong advantage

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