Position: Sr. Verification Engineer (IRT48ST RM 4301)
Job Description:
- Strong proficiency in SystemVerilog and HDL languages.Hands-on experience with UVM or other industry-standard verification methodologies.
- Strong object-oriented programming skills using SystemVerilog and C++.
- Ability to write and interpret architectural/design specifications and verification requirements.
- Experience in writing verification test plans.
- Proficiency in developing complex simulation test benches.
- Ability to implement directed and constrained-random test cases.
- Experience with functional and code coverage collection, analysis, and closure.
- Strong debugging skills for simulation issues, test cases, tools, and DUT (Device Under Test).
- Extensive experience in at least one of the high speed protocol related verification (PCIe/Ethernet/DDR/UCIe/CXL/USB).
- Proficiency in scripting languages such as Perl, Shell, and Python.
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Job Category: Embedded HW_SW
Job Type: Full Time
Job Location: Bangalore Pune Hyderabad
Experience: 4-8 years
Notice period: 0-30 days
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