Design Verification (DV) Engineers (SML48ST RM 4113)

Position: Design Verification (DV) Engineers (SML48ST RM 4113)

Job Overview:

• We are looking for skilled DV Engineers with strong expertise in design verification methodologies.
• Candidates should have hands-on experience in verification planning, testbench development, and debugging complex designs.
• Exposure to safety-critical systems — FuSa (Functional Safety) experience will be considered an added advantage.
• Design Verification (DV) for ASIC, with key skills SV/UVM (System Verilog / Universal Verification Methodology)
• Understanding of ISO26262 Functional Safety at chip level is added advantage

*********************************************************************************************************************************************