sradmin Position: Senior DV Engineer – UVM/SystemVerilog (BB810ST RM 4328)
Very good knowledge of UVM and SystemVerilog.
Some networking experience/exposure is welcome.
*************************************************************************************
Job Category: Others
Job Type: Full Time
Job Location: Bangalore
Experience: 8-10 years
Notice period: 0-30 days
Apply for this position
Mention correct information below. Mention skills aligned with the job description you are applying for. This would help us process your application seamlessly.
Software leader (PW1520SI RM 4327)
Prev post